Bond.az – Huawei Technologies presented a new scaling law and chip architecture on Monday that the company said could bring its chips to a transistor density equivalent to 1.4 nanometer process nodes by 2031.
He Tingbo, chair of Huawei Scientist Committee and president of the company’s semiconductor business department, introduced the Tau Scaling Law at the 2026 IEEE International Symposium on Circuits and Systems in Shanghai on Monday. He described the principle as guiding the next step in development of semiconductors and electronic systems.
He said Huawei had used the scaling law to design and mass produce 381 chips over the past six years.
The principle, called Her’s Law by He’s peers, proposes replacing traditional geometric miniaturization of transistors with time scaling. He also presented LogicFolding architecture, a technology designed to reduce resistive and capacitive load of signal propagation and increase transistor density.
Huawei’s new Kirin chips, scheduled to launch later this year, will be the first to use the LogicFolding architecture, He said.
The company has expanded development of its Ascend AI chips and Kunpeng processors as it seeks to address domestic computing demand previously met by companies such as Nvidia.
Huawei plans to launch its Ascend 950 series, including the 950PR and 950DT models, in 2026. The company will release the Ascend 960 in 2027 and the Ascend 970 in 2028, running parallel to AI chip releases from Nvidia and Advanced Micro Devices.
